Commit 32b1bc8e authored by enfo's avatar enfo

Label and naming changes

parent b33f4284
This diff is collapsed.
......@@ -7354,7 +7354,7 @@ Source: .. GRM43DR72E224KW01.pdf</description>
<part name="CLM-112-02-G-D-A" library="enfolib" deviceset="ADIS_HD" device="" value="CLM-112-02-G-D-A"/>
<part name="CLM-112-02" library="enfolib" deviceset="ADIS_HD" device="" value="CLM-112-02-G-D-A"/>
<part name="C1" library="resistor" library_urn="urn:adsk.eagle:library:348" deviceset="C-US" device="C0603" package3d_urn="urn:adsk.eagle:package:26138/1"/>
<part name="C2" library="resistor" library_urn="urn:adsk.eagle:library:348" deviceset="C-US" device="C0603" package3d_urn="urn:adsk.eagle:package:26138/1"/>
<part name="R1" library="resistor" library_urn="urn:adsk.eagle:library:348" deviceset="R-US_" device="R0603" package3d_urn="urn:adsk.eagle:package:26057/1" value="10k"/>
......@@ -7375,7 +7375,7 @@ NTNU 2017</text>
<frame x1="0" y1="0" x2="208.28" y2="106.68" columns="3" rows="2" layer="94"/>
<instance part="CLM-112-02-G-D-A" gate="G$1" x="60.96" y="55.88"/>
<instance part="CLM-112-02" gate="G$1" x="60.96" y="55.88"/>
<instance part="C1" gate="G$1" x="27.94" y="68.58"/>
<instance part="C2" gate="G$1" x="20.32" y="68.58"/>
<instance part="R1" gate="G$1" x="40.64" y="68.58" rot="R90"/>
......@@ -7392,7 +7392,7 @@ NTNU 2017</text>
<net name="VDD" class="1">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="VDD"/>
<pinref part="CLM-112-02" gate="G$1" pin="VDD"/>
<pinref part="R1" gate="G$1" pin="2"/>
<wire x1="25.4" y1="78.74" x2="38.1" y2="78.74" width="0.1524" layer="91"/>
<wire x1="38.1" y1="78.74" x2="40.64" y2="78.74" width="0.1524" layer="91"/>
......@@ -7445,7 +7445,7 @@ NTNU 2017</text>
<wire x1="25.4" y1="63.5" x2="27.94" y2="63.5" width="0.1524" layer="91"/>
<wire x1="25.4" y1="63.5" x2="25.4" y2="55.88" width="0.1524" layer="91"/>
<junction x="25.4" y="63.5"/>
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="GND"/>
<pinref part="CLM-112-02" gate="G$1" pin="GND"/>
<wire x1="25.4" y1="55.88" x2="33.02" y2="55.88" width="0.1524" layer="91"/>
<label x="22.86" y="55.88" size="1.778" layer="95" rot="R180"/>
<wire x1="25.4" y1="55.88" x2="22.86" y2="55.88" width="0.1524" layer="91"/>
......@@ -7497,7 +7497,7 @@ NTNU 2017</text>
<net name="VDDRTC" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="VDDRTC"/>
<pinref part="CLM-112-02" gate="G$1" pin="VDDRTC"/>
<wire x1="58.42" y1="76.2" x2="45.72" y2="76.2" width="0.1524" layer="91"/>
<wire x1="45.72" y1="76.2" x2="45.72" y2="88.9" width="0.1524" layer="91"/>
<wire x1="45.72" y1="88.9" x2="33.02" y2="88.9" width="0.1524" layer="91"/>
......@@ -7512,7 +7512,7 @@ NTNU 2017</text>
<net name="TRIG" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DIO1"/>
<pinref part="CLM-112-02" gate="G$1" pin="DIO1"/>
<wire x1="83.82" y1="66.04" x2="86.36" y2="66.04" width="0.1524" layer="91"/>
<label x="86.36" y="66.04" size="1.778" layer="95"/>
......@@ -7529,7 +7529,7 @@ NTNU 2017</text>
<net name="TOV" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DIO2"/>
<pinref part="CLM-112-02" gate="G$1" pin="DIO2"/>
<wire x1="83.82" y1="63.5" x2="86.36" y2="63.5" width="0.1524" layer="91"/>
<label x="86.36" y="63.5" size="1.778" layer="95"/>
......@@ -7546,7 +7546,7 @@ NTNU 2017</text>
<net name="DOUT" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DOUT"/>
<pinref part="CLM-112-02" gate="G$1" pin="DOUT"/>
<wire x1="83.82" y1="76.2" x2="86.36" y2="76.2" width="0.1524" layer="91"/>
<label x="86.36" y="76.2" size="1.778" layer="95"/>
......@@ -7563,7 +7563,7 @@ NTNU 2017</text>
<net name="DIN" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DIN"/>
<pinref part="CLM-112-02" gate="G$1" pin="DIN"/>
<wire x1="83.82" y1="78.74" x2="86.36" y2="78.74" width="0.1524" layer="91"/>
<label x="86.36" y="78.74" size="1.778" layer="95"/>
......@@ -7580,7 +7580,7 @@ NTNU 2017</text>
<net name="_CS" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="_CS"/>
<pinref part="CLM-112-02" gate="G$1" pin="_CS"/>
<wire x1="83.82" y1="73.66" x2="86.36" y2="73.66" width="0.1524" layer="91"/>
<label x="86.36" y="73.66" size="1.778" layer="95"/>
......@@ -7597,7 +7597,7 @@ NTNU 2017</text>
<net name="DIO4" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DIO4"/>
<pinref part="CLM-112-02" gate="G$1" pin="DIO4"/>
<wire x1="83.82" y1="58.42" x2="86.36" y2="58.42" width="0.1524" layer="91"/>
<label x="86.36" y="58.42" size="1.778" layer="95"/>
......@@ -7609,7 +7609,7 @@ NTNU 2017</text>
<net name="DIO3" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="DIO3"/>
<pinref part="CLM-112-02" gate="G$1" pin="DIO3"/>
<wire x1="83.82" y1="60.96" x2="86.36" y2="60.96" width="0.1524" layer="91"/>
<label x="86.36" y="60.96" size="1.778" layer="95"/>
......@@ -7621,7 +7621,7 @@ NTNU 2017</text>
<net name="SCLK" class="0">
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="SCLK"/>
<pinref part="CLM-112-02" gate="G$1" pin="SCLK"/>
<wire x1="83.82" y1="71.12" x2="86.36" y2="71.12" width="0.1524" layer="91"/>
<label x="86.36" y="71.12" size="1.778" layer="95"/>
......@@ -7639,7 +7639,7 @@ NTNU 2017</text>
<net name="_RST" class="1">
<pinref part="R1" gate="G$1" pin="1"/>
<pinref part="CLM-112-02-G-D-A" gate="G$1" pin="_RST"/>
<pinref part="CLM-112-02" gate="G$1" pin="_RST"/>
<wire x1="40.64" y1="63.5" x2="45.72" y2="63.5" width="0.1524" layer="91"/>
<label x="53.34" y="71.12" size="1.778" layer="95" rot="R180"/>
<pinref part="C3" gate="G$1" pin="1"/>
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